Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Microchip Technology/ATSAME51J19A/OSCCTRL/DFLLSYNC#0x0
DFLL48M Synchronization
ENABLE Synchronization Busy
DFLLCTRLB Synchronization Busy
DFLLVAL Synchronization Busy
DFLLMUL Synchronization Busy
https://github.com/cmsis-svd/cmsis-svd-data